US 2026/0310596 A1 · ARTIFICIAL INTELLIGENCE ENGINE (AIE) WITH MULTIPLE CORES AND SHARED MEMORY

Abstract

A data processing element (DPE), such as an artificial intelligence engine (AIE), with multiple cores and local data memory (LDM), where the DPEs include arbitration circuitry that synchronizes access to the LDM by the respective processing cores. An integrated circuit device may include multiple DPEs and configurable interconnects to permit selectable DPEs to communicate with one another (e.g., to access the LDMs of one another). A DPE may include additional arbitration circuitry to permit the cores of the DPE to access the LDM of another DPE via the same path. A DPE may include multiplexer circuitry to permit the cores of the DPE to communicate with cores of another DPE via the same path. The cores within a DPE may execute respective kernels of an application program in parallel, and may exchange data related to the kernels with one another via the LDM of the DPE.

Claims20

Dependent claims

An integrated circuit (IC) device, comprising:

multiple data processing elements (DPEs) and a configurable interconnect network configured to permit selectable ones of the DPEs to communicate with one another, wherein a first one of the DPEs comprises:
multiple processing cores;
local data memory (LDM);
and
first arbitration circuitry configured to synchronize access to the LDM by the processing cores.

2 more elements

Dependencies are inferred from the claim text.

Artificial intelligence engine (aie) with multiple cores and shared memory

Life of this patent

Artificial intelligence engine (aie) with multiple cores and shared memory

Life of this patent

Abstract

Claims20