Fault Detection Apparatus and Method
AssigneeReed Semiconductor Corporation
InventorsBiranchinath Sahu, Ashwani Kumar Singh
Life of this patent
Estimating the term…
Loading patent…
AssigneeReed Semiconductor Corporation
InventorsBiranchinath Sahu, Ashwani Kumar Singh
Estimating the term…
An apparatus includes a current source coupled to a bias voltage bus, a plurality of positive voltage detection control switches coupled to a first terminal connected to a positive voltage sense line of a power conversion system, a plurality of negative voltage detection control switches coupled to a second terminal connected to a negative voltage sense line of the power conversion system, and a fault detection comparator comprising a non-inverting input coupled to the first terminal through one of the plurality of positive voltage detection control switches, and coupled to the second terminal through one of the plurality of negative voltage detection control switches, an inverting input configured to receive a predetermined fault detection threshold voltage, and an output configured to generate a fault detection signal indicating whether a sense line disconnection fault occurs.
An apparatus comprising:
A method comprising:
A power conversion system comprising:
Dependencies are inferred from the claim text.