Cascode device package with dsdb bjt and fets

A system comprising:

• a controller configured to generate a plurality of control signals;
• and
• a bi-directional power switch coupled to receive the plurality of control signals, wherein the bi-directional power switch is implemented in a single electronic package that includes:
• a double-sided double-base bipolar junction transistor having a first base, a second base, a first collector-emitter terminal, and a second collector-emitter terminal;
• a first field-effect transistor (FET) electrically coupled between the first collector-emitter terminal and a first external pin of the electronic package;
• and
• a second FET electrically coupled between the second collector-emitter terminal and a second external pin, wherein the first FET and the second FET are coupled in a cascode configuration with the double-sided double-base bipolar junction transistor,
• wherein the controller is configured to generate the plurality of control signals to control respective states of the first FET, the second FET, and the double-sided double-base bipolar junction transistor, and wherein the bi-directional power switch is configured to operate in one of a plurality of modes depending on respective states of ones of the plurality of control signals.

An electronic circuit package comprising:

• a package body including a plurality of external terminals;
• a double-sided double-base bipolar junction transistor disposed within the package body, the transistor having a first base, a second base, a first collector-emitter terminal, and a second collector-emitter terminal;
• a first field-effect transistor (FET) disposed within the package body and electrically coupled between the first collector-emitter terminal and a first external terminal of the plurality of external terminals;
• a second FET disposed within the package body and electrically coupled between the second collector-emitter terminal and a second external terminal of the plurality of external terminals;
• and
• a first substrate and a second substrate disposed within the package body, wherein the double-sided double-base bipolar junction transistor is located in a region of overlap between the first substrate and the second substrate.