Semiconductor assembly including a semiconductor package with a delamination mitigation feature

Abstract

A semiconductor assembly includes: a laminate substrate that includes a plurality of laminate layers of electrically insulating material stacked on top of one another; a semiconductor package that includes a package body of electrically insulating encapsulant material and a plurality of electrical contacts that are exposed from the package body. The semiconductor package is embedded within the laminate layers of the laminate substrate. The semiconductor package includes a delamination mitigation feature. The delamination mitigation feature includes one or both of: a macrostructure that engages with the laminate layers; and a roughened surface of microstructures that enhances adhesion between the semiconductor package and the laminate layers.

Dependencies are inferred from the claim text.