Back to results
US 2026/0305452 A1Published application
Bonded semiconductor structures
AssigneeGlobalfoundries Singapore Pte. Ltd.
InventorsRanjan Rajoo, Chia Yee Chong, Hong Ting Toh
Life of this patent
Estimating the term…
Abstract
The present disclosure relates to semiconductor structures and, more particularly, to a chip bonded to a wafer and methods of manufacture. The structure includes: a wafer; a chip bonded to the wafer; and a continuous liner on an upper surface of the chip and extending on all sidewalls of the chip.
Claims20
A structure comprising:
- a substrate;
- a chip mounted to the substrate;
- and
- a continuous liner on an upper surface of the chip and extending on all sidewalls of the chip.
1 more element
A structure comprising:
- a substrate;
- and
- a chip comprising a continuous liner on a backside of the chip and partially on all sidewalls of the chip, the chip further comprising a mounting surface that is devoid of the continuous liner and which is mounted to the substrate.
A method comprising:
- partially dicing a device substrate from a first side of the device substrate;
- lining the first side of the device substrate with a continuous liner material on all of the sidewalls which are formed at a region of the partially dicing;
- completing the dicing of the device substrate from a second side of the device substrate to form a plurality of chips;
- and
- mounting the second side of each of the plurality of chips to a substrate with the continuous liner now being on an upper surface and all of the sidewalls of the chip, the upper surface being opposite to a mounting surface of the chip to the substrate.
2 more elements
Dependencies are inferred from the claim text.