Self-forming barrier for use in air gap formation
AssigneeAdeia Semiconductor Solutions LLC
InventorsBenjamin D. Briggs, Elbert Huang, Takeshi Nogami, Christopher J. Penny
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AssigneeAdeia Semiconductor Solutions LLC
InventorsBenjamin D. Briggs, Elbert Huang, Takeshi Nogami, Christopher J. Penny
Estimating the term…
A method of forming a semiconductor device comprises providing parallel interconnects disposed in a dielectric material. Each parallel interconnect comprises a conductive cap disposed on a manganese doped copper interconnect material disposed in a liner. One or more additional layers are deposited on the dielectric material and exposed surfaces of the conductive caps. Subsequent to depositing the one or more additional layers, a thermal treatment is applied to the parallel interconnects to form a layer comprising manganese between the liner and the dielectric material, and manganese between the conductive cap and the one or more additional layers. A lithography stack is patterned to form a first region where a first portion of the dielectric material is exposed, and a second region where a second portion is covered. The first portion is damaged by a chemical or plasma attack, and etched via a wet etch process to define air gaps.
1-20. (canceled)
A method of forming a semiconductor device, comprising:
Dependencies are inferred from the claim text.