Method for manufacturing semiconductor device
AssigneeMitsubishi Electric Corporation
InventorKoichiro NISHIZAWA
Life of this patent
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Abstract
A base layer (3) and a gold layer (4) are sequentially formed on a semiconductor substrate (1). A resist pattern (5) is formed on the gold layer (4). A plating film (6) is formed on a part of the gold layer (4) not covered by the resist pattern (5). The gold layer (4) and the base layer (3) exposed by removing the resist pattern (5) are etched by ion milling to form a metal mask (8). The semiconductor substrate (1) is plasma-etched using the metal mask (8) to form a via (9). The base layer (3) is at least one metal layer including one metal selected from Ti, Ta, W, Ni, Co, and Nb or an alloy of two or more of these metals. The thickness of the gold layer (4) is 20 nm or less. The thickness of the base layer (3) is 100 nm or more.
Claims7
A method for manufacturing a semiconductor device comprising:
- forming a base layer on a semiconductor substrate;
- forming a gold layer on the base layer;
- forming a resist pattern on the gold layer;
- forming a plating film on a part of the gold layer not covered by the resist pattern;
- etching, by ion milling, the gold layer and the base layer exposed by removing the resist pattern to form a metal mask of the base layer, the gold layer, and the plating film which are left;
- and
- plasma-etching the semiconductor substrate using the metal mask to form a via,
- wherein the base layer is a metal layer of at least one layer including one metal selected from Ti, Ta, W, Ni, Co, and Nb or an alloy of two or more of these metals,
- a thickness of the gold layer is 20 nm or less, and
- a thickness of the base layer is 100 nm or more.
Dependencies are inferred from the claim text.