Method for Manufacturing Memory Chip and Memory Chip Structure

A method for manufacturing a memory chip, comprising:

• etching a surface of a pattern transfer layer in a structure to be etched, so as to form a channel, wherein the channel extends to a bottom electrode dielectric layer in the structure to be etched, and the structure to be etched is a structure formed by sequential deposition of the bottom electrode dielectric layer and the pattern transfer layer on a surface of a bottom circuit;
• etching the pattern transfer layer at an opening of the channel, so as to obtain a widened pattern transfer layer channel;
• etching, along the widened pattern transfer layer channel, a region to be widened in the bottom electrode dielectric layer, so as to obtain a bottom electrode via structure which extends to the bottom circuit, wherein a depth of the region to be widened is less than a thickness of the bottom electrode dielectric layer;
• filling the bottom electrode via structure with a bottom electrode material, so as to obtain a final bottom electrode structure;
• and
• manufacturing a memory cell and a top circuit structure on a surface of the final bottom electrode structure facing away from the bottom circuit, so as to obtain the memory chip.