Double-gate carbon nanotube transistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJin Cai, Sheng-Kai Su
Life of this patent
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Abstract
A method includes depositing a dielectric layer over a substrate, forming carbon nanotubes on the dielectric layer, forming a dummy gate stack on the carbon nanotubes, forming gate spacers on opposing sides of the dummy gate stack, and removing the dummy gate stack to form a trench between the gate spacers. The carbon nanotubes are exposed to the trench. The method further includes etching a portion of the dielectric layer underlying the carbon nanotubes, with the carbon nanotubes being suspended, forming a replacement gate dielectric surrounding the carbon nanotubes, and forming a gate electrode surrounding the replacement gate dielectric.
Claims20
A device comprising:
- a plurality of carbon nanotubes;
- a gate stack comprising:
- a gate dielectric over the plurality of carbon nanotubes;
- and
- a gate electrode over the gate dielectric;
- a gate spacer on a sidewall of the gate stack;
- a contact etch stop layer overlapping portions of the plurality of carbon nanotubes;
- an inter-layer dielectric over the contact etch stop layer;
- and
- a source/drain contact plug electrically connected to the plurality of carbon nanotubes.
A device comprising:
- a substrate;
- a dielectric layer over the substrate;
- a carbon nanotube over and contacting a first portion and a second portion of the dielectric layer;
- a gate stack between the first portion and the second portion of the dielectric layer, wherein the gate stack contacts a first part of the carbon nanotube;
- a contact etch stop layer over and contacting a second part of the carbon nanotube;
- and
- an inter-layer dielectric over the contact etch stop layer.
A device comprising:
- a substrate comprising a top surface;
- a plurality of carbon nanotubes substantially parallel to and spaced apart from each other;
- a gate stack over the plurality of carbon nanotubes, the gate stack comprising:
- a gate dielectric comprising a first portion directly over the plurality of carbon nanotubes, and a second portion directly under the plurality of carbon nanotubes;
- and
- a gate electrode comprising a third portion over the first portion of the gate dielectric, and a fourth portion under the second portion of the gate dielectric;
- a gate spacer on a sidewall of the gate stack;
- a contact etch stop layer over and contacting the plurality of carbon nanotubes;
- and
- an inter-layer dielectric over the contact etch stop layer.
Dependencies are inferred from the claim text.