Semiconductor device structure and method for forming the same

A semiconductor device structure, comprising:

• first nanostructures formed over a first region of a substrate;
• a first gate structure comprising a first gate dielectric layer over the first nanostructure and a gate electrode over the first gate dielectric layer;
• a first gate spacer extending along a sidewall of the first gate structure, wherein a dielectric constant of the first gate dielectric layer is greater than a dielectric constant of the first gate spacer;
• first interposing structures interfacing sidewalls of the first nanostructures;
• first source/drain epitaxial structures surrounding the first interposing structures;
• an etch stop layer over the first source/drain epitaxial structures;
• and
• a dielectric layer over the etch stop layer,
• wherein the first interposing structures comprise SiB, and the first interposing structures vertically protrude from top surfaces of the first nanostructures and bottom surfaces of the first nanostructures.

A method for forming a semiconductor device structure, comprising:

• forming a fin structure comprising channel layers and sacrificial layers alternately stacked over a substrate;
• forming inner spacers between the channel layers;
• recessing the channel layers to form notches between the inner spacers;
• growing interposing structures in the notches and vertically extending outside the notches, wherein the interposing structures are made of a first semiconductor material with a first Ge concentration of lower than 5%;
• forming source/drain epitaxial structures surrounding the interposing structures;
• removing the sacrificial layers by performing a first etching process to form openings between the channel layers;
• and
• forming a gate structure in the openings,
• wherein etching rates of the interposing structures and the sacrificial layers in the first etching process are different.