US 2026/0304933 A1 · SEMICONDUCTOR DEVICE INCLUDING A BURIED PATTERN

Abstract

A semiconductor device includes a first region and a second region, the semiconductor device including a substrate which includes an insulating pattern in the first region, and a first semiconductor pattern in the second region, a separation pattern separating the insulating pattern and the first semiconductor pattern, between the insulating pattern and the first semiconductor pattern, a first active pattern on the insulating pattern, a first gate structure intersecting the first active pattern, a first source/drain region connected to the first active pattern, on a sidewall of the first gate structure, a second active pattern on the first semiconductor pattern, a second gate structure intersecting the second active pattern, a buried pattern on the first semiconductor pattern, a backside wiring structure on the insulating pattern and on the buried pattern and a back source/drain contact penetrating the insulating pattern, and connects the first source/drain region and the backside wiring structure.

Claims20

Dependent claims

A semiconductor device which includes a first region and a second region that are different from one another, the semiconductor device comprising:

a substrate which includes an insulating pattern in the first region, and a first semiconductor pattern in the second region;
a separation pattern which separates the insulating pattern and the first semiconductor pattern, between the insulating pattern and the first semiconductor pattern;
a first active pattern on an upper surface of the insulating pattern;
a first gate structure which intersects the first active pattern;
a first source/drain region which is connected to the first active pattern, on a sidewall of the first gate structure;
a second active pattern on an upper surface of the first semiconductor pattern;
a second gate structure which intersects the second active pattern;
a buried pattern on a lower surface of the first semiconductor pattern;
a backside wiring structure on a lower surface of the insulating pattern and on a lower surface of the buried pattern;
and
a back source/drain contact which penetrates the insulating pattern, and connects the first source/drain region and the backside wiring structure,
wherein the buried pattern includes a liner film extending along profiles of the lower surface of the first semiconductor pattern and the sidewall of the separation pattern, and a buried insulating film on the liner film.

9 more elements

A semiconductor device which includes a first region and a second region that are different from one another, the semiconductor device comprising:

a substrate which includes an insulating pattern in the first region, and a semiconductor pattern in the second region;
a first active pattern on an upper surface of the insulating pattern;
a first gate structure which intersects the first active pattern;
a source/drain region which is connected to the first active pattern, on a sidewall of the first gate structure;
a second active pattern on an upper surface of the semiconductor pattern;
a second gate structure which intersects the second active pattern;
a buried pattern on a lower surface of the semiconductor pattern;
a backside wiring structure on a lower surface of the insulating pattern and on a lower surface of the buried pattern;
and
a back source/drain contact which penetrates the insulating pattern, and connects the source/drain region and the backside wiring structure,
wherein the second region includes a first sub-region and a second sub-region that are different from one another, and
a thickness of the semiconductor pattern of the first sub-region is greater than a thickness of the semiconductor pattern of the second sub-region.

9 more elements

Dependencies are inferred from the claim text.

Semiconductor device including a buried pattern

Life of this patent

Semiconductor device including a buried pattern

Life of this patent

Abstract

Claims20