Semiconductor device including active pattern and insulation structure

A semiconductor device comprising:

• a plurality of first active patterns disposed above a substrate, comprising a plurality of first sheets disposed to be spaced apart along a first direction crossing a surface of the substrate, and disposed to be spaced apart from one another along a second direction crossing the first direction;
• a plurality of second active patterns disposed above the plurality of first active patterns, comprising a plurality of second sheets disposed to be spaced apart along the first direction, and disposed to be spaced apart from each other along the second direction;
• a first gate electrode configured to surround the plurality of first active patterns and extended along the second direction;
• a second gate electrode disposed above the first gate electrode, configured to surround the plurality of second active patterns, and extended along the second direction;
• a gate separation structure disposed between the first gate electrode and the second gate electrode in the first direction and disposed between the plurality of first active patterns in the second direction;
• and
• an intermediate insulation structure disposed between an uppermost first sheet among the plurality of first sheets and a lowermost second sheet among the plurality of second sheets and disposed at a side of the gate separation structure in the second direction,
• wherein the intermediate insulation structure comprises a first portion and a second portion that are connected to one another along the first direction, and
• a side surface of the first portion in the second direction is disposed, outwardly further than a side surface of the second portion in the second direction, toward the gate separation structure.

A semiconductor device comprising:

• a first active pattern disposed above a substrate and comprising a plurality of first sheets disposed to be spaced apart from one another along a first direction crossing a surface of the substrate;
• a second active pattern disposed above the first active pattern and comprising a plurality of second sheets disposed to be spaced apart from one another along the first direction;
• a first gate electrode configured to surround the first active pattern and extended along a second direction crossing the first direction;
• a second gate electrode disposed above the first gate electrode, configured to surround the second active pattern, and extended along the second direction;
• a first source/drain pattern disposed at a side of the first gate electrode in a third direction crossing the first direction and the second direction and connected to the first active pattern;
• a second source/drain pattern disposed at a side of the second gate electrode in the third direction and connected to the second active pattern;
• a first inter-layer insulation film disposed between the first source/drain pattern and the second source/drain pattern in the first direction;
• an intermediate insulation structure disposed between the first gate electrode and the second gate electrode in the first direction and disposed at a side of the first inter-layer insulation film in the third direction;
• and
• a gate separation structure disposed between the first gate electrode and the second gate electrode in the first direction, disposed at a side of the intermediate insulation structure in the second direction, and overlapping at least a portion of the first active pattern along the second direction,
• wherein the intermediate insulation structure comprises:
• a first portion disposed above the first gate electrode;
• and
• a second portion disposed on the first portion and of which a width along the second direction is smaller than that of the first portion along the second direction, and
• the gate separation structure is in contact with at least a portion of a side surface of the intermediate insulation structure.