Method of manufacturing a semiconductor device

A method of manufacturing a semiconductor device, the method comprising:

• forming an underlying structure comprising fin structures disposed over a substrate, gate structures disposed over upper portions of the fin structures, source/drain epitaxial layers over source/drain regions of the fin structures, and an interlayer dielectric (ILD) layer over the source/drain epitaxial layers;
• forming a first layer over the underlying structure;
• forming a second layer over the first layer;
• forming a third layer over the second layer;
• forming a fourth layer over the third layer;
• forming a fifth layer over the fourth layer;
• forming a first resist layer over the fifth layer;
• forming a first photo resist pattern over the first resist layer;
• adjusting a dimension of the first photo resist pattern;
• patterning the first resist layer by using the first photo resist pattern as an etching mask;
• patterning the fifth layer by using the patterned first resist layer as an etching mask;
• forming a second resist layer over the patterned fifth layer;
• patterning the second resist layer by using one or more second photo resist patterns as an etching mask;
• and
• patterning the fourth and third layers by using the patterned second resist layer and the patterned fifth layer as an etching mask.

A method of manufacturing a semiconductor device, the method comprising:

• forming a first layer, a second layer, a third layer, a fourth layer, and a fifth layer, in order, over an underlying structure;
• forming a first resist layer over the fifth layer;
• forming a first photo resist pattern over the first resist layer using multiple patterns arranged along a first direction;
• reducing a width of the first photo resist pattern along a second direction using a direction etching process or a directional ion implantation process, thereby dividing the first photo resist pattern into pieces of first photo resist pattern;
• patterning the first resist layer by using the pieces of the first photo resist pattern as an etching mask;
• patterning the fifth layer by using the patterned first resist layer as an etching mask;
• forming a second resist layer over the patterned fifth layer;
• patterning the second resist layer by using one or more second photo resist patterns as an etching mask;
• patterning the fourth and third layers by using the patterned second resist layer and the patterned fifth layer as an etching mask;
• patterning the second layer, the first layer and the underlying structure by using the patterned fourth and third layers as an etching mask, thereby forming trench patterns over source/drain epitaxial layers of the underlying structure;
• and
• forming source/drain contact patterns by filling the trench patterns with a conductive material.