Semiconductor memory device including plurality of single crystalline silicon layers
AssigneeSamsung Electronics Co., Ltd.
InventorsYuyeon Kim, Moohyun Kim, Hyungjoon Kim, Siyeong Yang, Jaeho Jung
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Abstract
A semiconductor memory device includes a substrate and a plurality of single crystalline silicon layers arranged in a line in a vertical direction on the substrate and spaced apart from one another in the vertical direction, wherein, in each of the plurality of single crystalline silicon layers, a surface facing a lateral direction substantially orthogonal to the vertical direction is oriented along a (100) crystal plane, and, from among the plurality of single crystalline silicon layers, a lowest-level single crystalline silicon layer closest to the substrate includes metal impurities.
Claims20
A semiconductor memory device comprising:
- a substrate;
- and
- a plurality of single crystalline silicon layers arranged in a line in a vertical direction on the substrate and spaced apart from one another in the vertical direction,
- wherein, in each of the plurality of single crystalline silicon layers, a surface facing a lateral direction substantially orthogonal to the vertical direction is oriented along a (100) crystal plane, and,
- from among the plurality of single crystalline silicon layers, a lowest-level single crystalline silicon layer closest to the substrate comprises metal impurities.
A semiconductor memory device comprising:
- a substrate;
- and
- a memory cell block comprising a plurality of memory cells arranged on the substrate, the memory cell block having a three-dimensional structure,
- wherein the plurality of memory cells are repeatedly arranged in a first lateral direction, a second lateral direction, and a vertical direction and each comprise a plurality of active regions, each of which comprises a single crystalline silicon layer, wherein the first lateral direction and the second lateral direction are substantially orthogonal to one another, and the vertical direction is substantially perpendicular to each of the first lateral direction and the second lateral direction,
- in each of the plurality of active regions, a first surface facing the second lateral direction is oriented along a (100) crystal plane, and,
- from among the plurality of active regions, lowest-level active regions closest to the substrate in the vertical direction comprise metal impurities.
A semiconductor memory device comprising:
- a substrate;
- and
- a memory cell block having a three-dimensional structure, the memory cell block comprising a plurality of memory cells that are repeatedly arranged on a main surface of the substrate in a first lateral direction, a second lateral direction, and a vertical direction, wherein the first lateral direction and the second lateral direction are substantially parallel to the main surface and substantially orthogonal to one another, and the vertical direction is substantially perpendicular to the main surface of the substrate,
- wherein the memory cell block comprises:
- a plurality of active regions arranged in a line in the vertical direction on the substrate, each active region comprising a single crystalline silicon layer;
- a plurality of word lines, each word line surrounding a selected one of the plurality of active regions and extending in the second lateral direction, the plurality of word lines overlapping one another in the vertical direction;
- a bit line extending in the vertical direction on the substrate, the bit line being connected to one side of each of the plurality of active regions;
- and
- a plurality of capacitors, each capacitor comprising a first electrode configured to be connected to another side of a selected one of the plurality of active regions,
- wherein, in each of the plurality of active regions, a first surface facing the second lateral direction is oriented along a (100) crystal plane,
- from among the plurality of active regions, a lowest-level active region closest to the substrate in the vertical direction comprises metal impurities, and,
- from among the plurality of active regions, active regions that are spaced apart in the vertical direction from the substrate with the lowest-level active region therebetween do not comprise metal impurities.
Dependencies are inferred from the claim text.