Semiconductor structure
AssigneeMacronix International Co., Ltd.
InventorsYung-Hsiang Chen, I-Chen Yang, Yao-Wen Chang, Jung-Chuan Ting
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AssigneeMacronix International Co., Ltd.
InventorsYung-Hsiang Chen, I-Chen Yang, Yao-Wen Chang, Jung-Chuan Ting
Estimating the term…
The present disclosure provides a semiconductor structure. The semiconductor structure may be included in a memory device. The memory device is, for example, a 3D NAND flash memory and provides a storage media with high-performance and high-capacity. The semiconductor structure includes a substrate including an active region and a source region, a drain region and at least one lightly doped region disposed in the active region, a gate layer disposed over the active region, and a dummy gate layer disposed over the lightly doped region and electrically connected to the gate layer. The source region and the drain region are disposed at opposite sides of the gate layer in a first direction, and the lightly doped region is configured between the gate layer and the drain region.
A semiconductor structure, comprising:
A semiconductor structure, comprising:
A semiconductor structure, comprising:
Dependencies are inferred from the claim text.