Memory Circuitry And Methods Used In Forming Memory Circuitry

A method used in forming memory circuitry, comprising:

• forming two memory-array regions individually comprising vertically-alternating insulative tiers and memory-cell tiers, an intervening region being laterally between the two memory-array regions in a horizontal x-direction, a connection region adjacent each of the two memory-array regions on an opposite-x-direction side from where the intervening region is located;
• forming a first trench vertically through the vertically-alternating insulative and memory-cell tiers in the intervening region and forming a second trench vertically through the vertically-alternating insulative and memory-cell tiers in the connection regions;
• filling the first and second trenches with sacrificial material;
• forming access lines in the memory-cell tiers that extend from the two memory-array regions into the intervening region while the first and second trenches are filled with the sacrificial material, the access lines being spaced from one another in a horizontal y-direction that is perpendicular the horizontal x-direction, immediately horizontally adjacent of the access lines from individual of the two memory-array regions connecting with one another in the intervening region, the first trench being spaced from the immediately-horizontally-adjacent access lines in the x-direction;
• removing the sacrificial material from the first and second trenches;
• after the removing and through the first trench, etching laterally through the immediately-horizontally-adjacent access lines to separate them from being connected with one another;
• and
• after the etching, simultaneously forming an insulative wall in the first trench and an insulative wall in the second trench.

Memory circuitry comprising:

• two memory-array regions individually comprising vertically-alternating insulative tiers and memory-cell tiers, access lines in the memory-cell tiers that are horizontally elongated in a horizontal x-direction and spaced relative one another in a horizontal y-direction that is perpendicular the horizontal x-direction;
• an intervening region laterally between the two memory-array regions in the horizontal x-direction, the access lines extending from the two memory-array regions into the intervening region, the access lines having x-direction ends in the intervening region;
• and
• an insulative wall in the intervening region that extends vertically through the insulative and memory-cell tiers, the insulative wall extending horizontally from and between the x-direction ends of immediately horizontally adjacent of the access lines, the insulative wall having an elevationally-extending surface in individual of the memory-cell tiers that is horizontally concave between the x-direction ends of the immediately-horizontally-adjacent access lines.