Back to results
US 2026/0302937 A1Published application
Semiconductor device
AssigneeRenesas Electronics Corporation
InventorsAtsushi TSUDA, Kosuke YAYAMA
Life of this patent
Estimating the term…
Abstract
The semiconductor device includes a plurality of stages of switched-capacitor circuits, in which respective switch control circuits are cascade-connected. The clock generation circuit generates a clock signal, and outputs the clock signal to a first-stage switched-capacitor circuit. Each of the switch control circuits SWCT generates switching signals for switches by processing an input clock signal from a preceding stage with logic gates, and outputs, to a succeeding stage, an output clock signal in which a delay is added to the input clock signal by the logic gates.
Claims6
A semiconductor device comprising:
- a power supply line that supplies power to a predetermined load;
- a plurality of stages of switched-capacitor circuits, each of which includes a switch, a switch control circuit, and a flying capacitor, and in which the respective switch control circuits are connected in cascade;
- and
- a clock generation circuit that generates a clock signal and outputs the clock signal to a first-stage switched-capacitor circuit among the plurality of stages of switched-capacitor circuits,
- wherein each of the switch control circuits generates a switching signal for the switch by processing an input clock signal from a preceding stage with logic gates, and outputs, to a subsequent stage, an output clock signal obtained by adding a delay to the input clock signal by the logic gates, and
- wherein each of the plurality of stages of switched-capacitor circuits supplies power to the common power supply line by alternately switching between a charging operation and a discharging operation for the flying capacitor by switching of the switch.
3 more elements
Dependencies are inferred from the claim text.