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US 2026/0302833 A1Published application
Dynamic Boost with Constant Current Mode
AssigneeAvago Technologies International Sales Pte. Limited
InventorsMarc Keppler, John Walley, Jim Le
Life of this patent
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Abstract
A system and apparatuses for dynamic boost with constant current mode are provided. According a specific embodiment, the present invention provides an apparatus comprising a first circuit that receives a wireless power signal and generates alternating current signals, and a second circuit that rectifies the input signal to produce a direct current output. The second circuit, equipped with low-side and high-side transistors, dynamically boosts the output signal and is capable of entering a constant current mode, maintaining transistor activation for a specified duration.
Claims20
An apparatus comprising:
- a first circuit configured to receive a wireless power signal and generate a first input signal and a second input signal from the wireless power signal, wherein the first input signal and the second input signal are alternating current signals;
- a second circuit coupled to the first circuit and configured to rectify the first input signal and the second input signal to generate an output signal, wherein the output signal is a direct current signal, wherein the second circuit comprises:
- a first low-side transistor coupled to a first node;
- a second low-side transistor coupled to a second node;
- a first high-side transistor coupled to the first node;
- a second high-side transistor coupled to the second node;
- and
- control logic coupled to the first low-side transistor, the second low-side transistor, the first high-side transistor, and the second high-side transistor, wherein the control logic is configured to enable the first low-side transistor and the second low-side transistor for a boost duration on a falling edge of the first input signal or a falling edge of the second input signal, and
- wherein the control logic is configured to cause the second circuit to enter a constant current mode, wherein in the constant current mode the first high-side transistor, the second high-side transistor, the first low-side transistor, and the second low-side transistor are forced to remain enabled for a first duration following a rising edge of the first input signal or the second input signal.
6 more elements
An apparatus comprising:
- a field coil configured to receive a wireless power signal and generate a first input signal at a first node and a second input signal at a second node, wherein the first input signal and the second input signal are alternating current signals;
- a rectifying circuit coupled to the field coil, the rectifying circuit comprising:
- a first low-side field effect transistor coupled to the first node and to ground;
- a second low-side field effect transistor coupled to the second node and to ground;
- a first high-side field effect transistor coupled to the first node and to an output node;
- a second high-side field effect transistor coupled to the second node and to the output node;
- a comparator coupled to the first node and the second node;
- and
- control logic coupled to the first low-side field effect transistor, the second low-side field effect transistor, the first high-side field effect transistor, and the second high-side field effect transistor, wherein the control logic is configured to enable the first low-side field effect transistor and the second low-side field effect transistor for a boost duration on a falling edge of the first input signal or the second input signal, and
- wherein the control logic is configured to cause the first low-side field effect transistor, the second low-side field effect transistor, the first high-side field effect transistor, and the second high-side field effect transistor to remain enabled for a duration following a rising edge of the first input signal or the second input signal.
7 more elements
An apparatus comprising:
- a field coil configured to receive a wireless power signal and generate a first alternating current signal and a second alternating current signal;
- a rectifying circuit coupled to the field coil, the rectifying circuit comprising:
- a first low-side transistor and a second low-side transistor;
- a first high-side transistor and a second high-side transistor;
- wherein the first low-side transistor and the first high-side transistor are coupled to a first node, and the second low-side transistor and the second high-side transistor are coupled to a second node;
- and
- control logic coupled to the first low-side transistor, the second low-side transistor, the first high-side transistor, and the second high-side transistor, wherein the control logic is configured to enable the first low-side transistor and the second low-side transistor for a boost duration on a falling edge at the first node or the second node, and
- wherein the control logic is configured to cause the rectifying circuit to enter a constant current mode, wherein in the constant current mode the first low-side transistor, the second low-side transistor, the first high-side transistor, and the second high-side transistor are forced to remain enabled for a duration following a rising edge at the first node or the second node.
5 more elements
Dependencies are inferred from the claim text.