Memory system configured for controlling a fuse array circuit

An integrated circuit comprising:

• a direct access (DA) pad area configured to generate an input control signal by receiving an external input signal from an outside of the integrated circuit through a plurality of pads, configured to generate an external output signal in response to receiving an output control signal, and configured to output the external output signal to the outside of the integrated circuit through the plurality of pads;
• and
• a fuse array circuit configured to perform a bootup operation of outputting fuse data programmed into a plurality of electronic fuses (E-fuses) based on a power-up signal and configured to perform a rupture operation of programming the fuse data by cutting the plurality of E-fuses based on a fuse control command,
• wherein the fuse array circuit detects whether the rupture operation is performed based on the input control signal after a start of a direct access operation.

A memory device comprising:

• a first micro bump configured to generate an input control signal by receiving an external input signal from an outside of the memory device;
• a second micro bump configured to generate an external output signal in response to receiving an output control signal and configured to output the external output signal to the outside of the memory device;
• and
• a base chip electrically connected to the first micro bump and the second micro bump, configured to generate fuse data by performing a bootup operation and a rupture operation on a plurality of electronic fuses (E-fuses) based on a power-up signal and a fuse control command, configured to generate the output control signal from the fuse data and to output the output control signal to the second micro bump, and configured to detect whether the rupture operation is performed based on the input control signal received through the first micro bump.