Back to results
US 2026/0301789 A1Published application
Memory system
AssigneeAisin Corporation
InventorTakanobu NARUSE
Life of this patent
Estimating the term…
Abstract
A memory system according to an embodiment includes: an STT-MRAM having a plurality of memory areas for storing data; and a memory controller configured to control a write, a read, and a refresh for each of the plurality of memory areas, wherein the memory controller performs a refresh on a predetermined one of the memory areas in a case where a predetermined time has elapsed since a last write.
Claims3
A memory system comprising:
- a spin transfer torque-magnetoresistive random access memory (STT-MRAM) having a plurality of memory areas for storing data;
- and
- a memory controller configured to control a write, a read, and a refresh for each of the plurality of memory areas, wherein
- the memory controller performs a refresh on a predetermined one of the memory areas in a case where a predetermined time has elapsed since a last write.
1 more element
Dependencies are inferred from the claim text.