US 2026/0301788 A1Published application

Midpoint sensing reference generation for stt-mram

AssigneeEverspin Technologies, Inc.

InventorsMichael A. SADD, Syed M. ALAM

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Abstract

The present disclosure is drawn to a magnetoresistive memory (MRAM) comprising a magnetoresistive memory array comprising a plurality of magnetoresistive devices arranged in rows and columns, wherein the columns include a reference column and a regular column, the regular column includes a regular bit line and a first subset of magnetoresistive devices coupled to the regular bit line and select devices within the regular column, and the reference column includes a reference bit line, a dummy reference bit line, and a second subset of magnetoresistive devices coupled to the dummy reference bit line. The reference bit line is coupled to selective devices within the reference column. The MRAM also includes a column selection circuitry configured to select the regular bit line or the reference bit line, a sense amplifier coupled to the column selection circuitry, and a trim circuit midpoint generator including a tracking circuit and a programmable resistance.

Claims20

Dependent claims

A magnetoresistive device comprising:

a magnetoresistive memory array comprising a plurality of magnetoresistive devices arranged in a plurality of rows and a plurality of columns, wherein:
the plurality of columns includes a reference column and a regular column,
the regular column includes a regular bit line and a first subset of magnetoresistive devices of the plurality of magnetoresistive devices, the first subset of magnetoresistive devices coupled to the regular bit line and a plurality of select devices within the regular column;
and
the reference column includes a reference bit line, a dummy reference bit line, and a second subset of magnetoresistive devices of the plurality of magnetoresistive devices, the second subset of magnetoresistive devices coupled to the dummy reference bit line, and the reference bit line coupled to a plurality of select devices within the reference column;
a column selection circuitry configured to select the regular bit line or the reference bit line;
a sense amplifier coupled to the column selection circuitry, the sense amplifier including a first input associated with the reference bit line and a second input connected to the regular bit line through the column selection circuitry;
and
a trim circuit midpoint generator including a tracking circuit and a programmable resistance, the tracking circuit connected to the first input of the sense amplifier and the programmable resistance, and the programmable resistance connected to the tracking circuit and the reference bit line through the column selection circuitry.

6 more elements

A magnetoresistive device comprising:

a plurality of magnetoresistive memory array groups, each magnetoresistive memory array group of the plurality of magnetoresistive memory array groups comprising:
a plurality of magnetoresistive devices arranged in a plurality of rows and a plurality of columns, wherein:
the plurality of columns comprise a reference column and a regular column,
the regular column comprises a regular bit line and a first subset of magnetoresistive devices of the plurality of magnetoresistive devices, the first subset of magnetoresistive devices coupled to the regular bit line and a plurality of select devices within the regular column;
and
the reference column comprises a reference bit line, a dummy reference bit line, and a second subset of magnetoresistive devices of the plurality of magnetoresistive devices, the second subset of magnetoresistive devices coupled to the dummy reference bit line, and the reference bit line coupled to a plurality of select devices within the reference column;
a column selection circuitry configured to select the regular bit line or the reference bit line;
a sense amplifier coupled to the column selection circuitry, the sense amplifier including a first input associated with the reference bit line and a second input connected to the regular bit line through the column selection circuitry;
and
a trim circuit midpoint generator including a tracking circuitry, the tracking circuit connected to the first input of the sense amplifier and to the reference bit line through the column selection circuitry.

7 more elements

A magnetoresistive device comprising:

a plurality of magnetoresistive memory array groups, each magnetoresistive memory array group of the plurality of magnetoresistive memory array groups comprising:
a plurality of magnetoresistive memory devices arranged in a plurality of rows and a plurality of columns, wherein:
the plurality of columns comprise a reference column and a regular column,
the regular column comprises a regular bit line and a first subset of magnetoresistive devices of the plurality of magnetoresistive devices, the first subset of magnetoresistive devices coupled to the regular bit line and a plurality of select devices within the regular column;
and
the reference column comprises a reference bit line, the reference bit line coupled to a plurality of select devices within the reference column;
a column selection circuitry configured to select the regular bit line or the reference bit line;
a sense amplifier coupled to the column selection circuitry, the sense amplifier including a first input associated with the reference bit line and a second input connected to the regular bit line through the column selection circuitry;
and
a tracking circuit connected to the first input of the sense amplifier;
and
a programmable resistance connected to the tracking circuit and the column selection circuitry.

9 more elements

Dependencies are inferred from the claim text.