Gate driving circuit, display device including the same, and electronic device including the same
AssigneeSamsung Display Co., Ltd.
InventorEOK SU KIM
Life of this patent
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Abstract
A gate driving circuit includes a buffer transistor, which outputs a gate clock signal as a gate output signal in response to a signal of a pull-up control node and a boost capacitor, which boosts a voltage level of the signal of the pull-up control node. The buffer transistor includes a semiconductor pattern, a gate electrode connected to the pull-up control node, an input electrode to which the gate clock signal is applied, and an output electrode connected to a gate output terminal. The boost capacitor includes a first electrode connected to the gate electrode of the buffer transistor and a second electrode connected to the output electrode of the buffer transistor. The boost capacitor entirely overlaps the buffer transistor in a plan view.
Claims20
A gate driving circuit comprising:
- a buffer transistor, which outputs a gate clock signal as a gate output signal in response to a signal of a pull-up control node, wherein the buffer transistor includes a semiconductor pattern, a gate electrode connected to the pull-up control node, an input electrode to which the gate clock signal is applied, and an output electrode connected to a gate output terminal;
- and
- a boost capacitor, which boosts a voltage level of the signal of the pull-up control node, wherein the boost capacitor includes a first electrode connected to the gate electrode of the buffer transistor and a second electrode connected to the output electrode of the buffer transistor,
- wherein the boost capacitor entirely overlaps the buffer transistor in a plan view.
A display device comprising:
- a substrate including a display area and a peripheral area around the display area;
- a pixel transistor disposed in the display area on the substrate;
- a light emitting element disposed in the display area on the substrate and connected to the pixel transistor;
- and
- a gate driving circuit disposed in the peripheral area on the substrate and including:
- a buffer transistor, which outputs a gate clock signal as a gate output signal in response to a signal of a pull-up control node, the buffer transistor including a semiconductor pattern, a gate electrode connected to the pull-up control node, an input electrode to which the gate clock signal is applied, and an output electrode connected to a gate output terminal;
- and
- a boost capacitor, which boosts a voltage level of the signal of the pull-up control node, the boost capacitor including a first electrode connected to the gate electrode of the buffer transistor and a second electrode connected to the output electrode of the buffer transistor,
- wherein the boost capacitor entirely overlaps the buffer transistor in a plan view.
An electronic device comprising:
- a display device including:
- a display panel including a plurality of gate lines;
- and
- a gate driver including a plurality of gate driving circuits, which outputs gate signals to the plurality of gate lines;
- and
- a processor, which provides input image data and an input control signal to the display device,
- wherein each of the plurality of gate driving circuits includes:
- a buffer transistor, which outputs a gate clock signal as a gate output signal in response to a signal of a pull-up control node, the buffer transistor including a semiconductor pattern, a gate electrode connected to the pull-up control node, an input electrode to which the gate clock signal is applied, and an output electrode connected to a gate output terminal;
- and
- a boost capacitor, which boosts a voltage level of the signal of the pull-up control node, the boost capacitor including a first electrode connected to the gate electrode of the buffer transistor and a second electrode connected to the output electrode of the buffer transistor,
- wherein the boost capacitor entirely overlaps the buffer transistor in a plan view.
Dependencies are inferred from the claim text.