Scan driver, display device including the scan driver, and electronic device including the display device

Abstract

A scan driver includes a unit stage including a plurality of stages configured to receive a plurality of clock signals and sequentially output a plurality of scan signals. The unit stage includes one sharing circuit and a plurality of buffer circuits each corresponding to the plurality of stages. The sharing circuit includes a first transistor configured to supply a start signal to a first node based on a first clock signal received from a first clock line, a second transistor configured to supply the first clock signal to a second node based on a voltage of the first node, and a third transistor configured to supply a gate low voltage to the second node based on the first clock signal. Each of the plurality of buffer circuits is directly connected to the first node and the second node and outputs the plurality of scan signals.

Dependencies are inferred from the claim text.