Back to results
US 2026/0300593 A1Published application
Concurrent testing for semiconductor devices
AssigneeIntel Corporation
InventorsEdward BRAZIL, Baruch SCHNARCH, Naphtali G. LEVY, Ahmad HAMDAN
Life of this patent
Estimating the term…
Abstract
Methods and systems are provided for bundling semiconductor tests. Bundling semiconductor tests can maximize test concurrency and minimize test time. Bundling of semiconductor tests includes breaking tests into parts and algorithms that are capable of interleaving the parts according to rules and constraints. Machine learning can be applied to predict run times for large numbers of bundle permutations.
Claims20
A system comprising:
- a computer system wherein the computer system comprises instructions that cause the computer system to:
- create permutations of concurrent bundles of semiconductor test patterns wherein the concurrent bundles of semiconductor test patterns are comprised of at least two semiconductor test patterns wherein the at least two semiconductor test patterns are each broken into at least three constituent parts,
- predict a total test run time for each of the permutations of concurrent bundles based on content type of the at least three constituent parts of each of the at least two semiconductor test patterns;
- and
- select one or more concurrent bundles of semiconductor test patterns wherein a selected concurrent bundle of semiconductor test patterns exhibits a lower total run time than a sum of total run times of individual semiconductor test patterns of the at least two semiconductor test patterns;
- and
- a first interface capable of interfacing with a second interface that is capable of coupling to a semiconductor chip wherein the computer system is capable of sending and receiving data from a semiconductor chip coupled to the second interface through the first interface.
4 more elements
A method comprising:
- splitting two or more semiconductor tests into parts wherein the parts comprise at least a program part, a run part, and a check part for each of the two or more semiconductor tests;
- bundling a plurality of parts according to constraints using a first algorithm and a second algorithm, wherein the first algorithm orders a plurality of parts that are larger than the parts that are ordered by the second algorithm, wherein the second algorithm interleaves a plurality of parts into gaps left by the first algorithm;
- and
- determining a first run time for a bundle of parts of the plurality of parts wherein the first run time for the bundle of parts is less than a second run time that is a sum of part run times for the plurality of parts.
1 more element
At least one machine-readable storage medium comprising non-transitory instructions, that when executed by a processor, cause a device to:
- split two or more semiconductor tests into parts wherein the parts comprise at least a program part, a run part, and a check part for each of the two or more semiconductor tests;
- bundle a plurality of semiconductor tests according to constraints using a first algorithm and a second algorithm, wherein the first algorithm orders a plurality of parts that are larger than the parts that are ordered by the second algorithm, wherein the second algorithm interleaves a plurality of parts into gaps left by the first algorithm;
- and
- determine run times for each bundle of semiconductor tests of the plurality of semiconductor tests.
1 more element
Dependencies are inferred from the claim text.