Memory defect management

A system comprising:

• a processing system;
• and
• memory comprising computer executable instructions that, when executed, perform operations comprising:
• sending, to a basic input/output system (“BIOS”), a first local list of defective memory addresses corresponding to a plurality of defective portions of the memory;
• receiving, from the BIOS, a list of repaired memory addresses corresponding to portions of the plurality of defective portions of the memory that have been repaired by the BIOS;
• performing a first comparison of the list of repaired memory addresses with the first local list of defective memory addresses retrieved from the memory;
• and
• generating a second local list of defective memory addresses by updating the first local list of defective memory addresses based on the first comparison.

A method comprising:

• receiving a first uploaded list of defective memory addresses that was previously uploaded to data storage by an operating system (“OS”) of a system;
• performing a first comparison of a first local list of defective memory addresses with the first uploaded list of defective memory addresses;
• and
• based on a determination that the first local list of defective memory addresses is different from the first uploaded list of defective memory addresses:
• generating a second uploaded list of defective memory addresses by updating the first uploaded list of defective memory addresses based on the first comparison, and
• uploading, to the data storage, the second uploaded list of defective memory addresses.

A device comprising:

• a processing system;
• and
• memory comprising computer executable instructions that, when executed, perform operations comprising:
• receiving a first uploaded list of defective memory addresses that was previously uploaded to data storage;
• performing a comparison of a local list of defective memory addresses with the first uploaded list of defective memory addresses;
• and
• based on a determination that the local list of defective memory addresses is different from the first uploaded list of defective memory addresses:
• generating a second uploaded list of defective memory addresses by updating the first uploaded list of defective memory addresses based on the comparison, and
• uploading, to the data storage, the second uploaded list of defective memory addresses.