Systems and methods for interrupt request processing
AssigneeGoogle Inc.
InventorsAli Taha, Seyed Hossein Sadat Kooch Mohtasha, Seyed Hamed Fatemi, Vinu Vijay Kumar
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Abstract
Methods, systems, and apparatus for reducing power consumption in interrupt request processing. A computing system can include a system-on-chip (SoC), which in turn can include a central processing unit (CPU), an embedded processor, an interrupt handler and at least one hardware accelerator. The interrupt handler can receive interrupt requests from the SoC and route certain types of interrupt requests to the embedded processor for processing, instead of the CPU. This alleviates the need for the CPU to wake up from a lower power state to process particular interrupt requests.
Claims14
A method implemented at a computing device that includes a system-on-chip comprising a central processing unit (CPU) and an embedded processor, the method comprising:
- receiving, from a first process executing on the computing device, a first interrupt request;
- determining, by an interrupt handler and based on one or more attributes of the first interrupt request, that processing of the first interrupt request is to be routed to the embedded processor instead of the CPU;
- and
- routing, by the interrupt handler, the first interrupt request to the embedded processor;
- receiving, from the embedded processor and by the interrupt handler, confirmation that the first interrupt request has been processed by the embedded processor.
Dependencies are inferred from the claim text.