Storage device

A storage device comprising:

• a storage controller;
• a first memory device comprising a first memory cell array, the first memory device being connected to the storage controller via a data bus and a plurality of first CA buses;
• and
• a second memory device comprising a second memory cell array, the second memory device being connected to the storage controller via the data bus and a plurality of second CA buses,
• wherein the storage controller is configured to:
• transmit a first command set to the first memory device via a (1-1)-th CA bus among the plurality of first CA buses;
• transmit a second command set to the first memory device via a (1-2)-th CA bus among the plurality of first CA buses;
• transmit, in parallel, at least a portion of the first command set and at least a portion of the second command set so that transmission periods of the at least portions of the first command set and the second command set overlap with each other;
• transmit a third command set to the second memory device via a (2-1)-th CA bus among the plurality of second CA buses;
• transmit, in parallel, at least a portion of the first command set and at least a portion of the third command set so that transmission periods of the at least portions of the first command set and the third command set overlap with each other;
• transmit a fourth command set to the second memory device via a (2-2)-th CA bus among the plurality of second CA buses;
• and
• transmit, in parallel, at least a portion of the third command set and at least a portion of the fourth command set so that transmission periods of the at least portions of the third command set and the fourth command set overlap with each other.

A storage device comprising:

• a storage controller comprising a first data pin and a plurality of first CA pins;
• and
• a memory device comprising a memory cell array comprising a plurality of pages comprising a plurality of memory cells connected to word lines, a second data pin connected to the first data pin via a data bus, and a plurality of second CA pins connected to the plurality of first CA pins via a plurality of CA buses,
• wherein the storage controller is configured to:
• transmit, via a first CA bus among the plurality of CA buses, a first command set comprising a plurality of granularity commands configured to read a portion of a first page among the plurality of pages smaller than a page unit;
• and
• transmit, via a second CA bus among the plurality of CA buses, a second command set comprising a plurality of granularity commands configured to read a portion of a second page among the plurality of pages smaller than a page unit, and
• transmit, in parallel, at least portions of the first command set and the second command set so that transmission periods of the at least portions of the first command set and the second command set overlap with each other,
• wherein the memory device comprises:
• a first command decoder configured to receive and decode commands via the first CA bus;
• and
• a second command decoder configured to receive and decode commands via the second CA bus, and
• wherein the memory device is further configured to:
• transmit, to the storage controller, first data obtained by reading the portion of the first page among the plurality of pages based on the first command set, and
• transmit, to the storage controller, second data obtained by reading the portion of the second page among the plurality of pages based on the second command set.