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AssigneeMicron Technology, Inc.
InventorsJohn E. Maroney, Pedro Cordon
Estimating the term…
Methods, systems, and devices for low power management and clock management within a multi-port memory system are described. A memory system may support clock management and power management across multiple ports within the memory system. The memory system may perform power management on a per-port basis according to a set of power state transition rules and protocols. The memory system may receive a configuration for operation of the ports according to a set of link states. The memory system may perform clock management by receiving signaling that indicates a clocking configuration across the set of ports. The clocking configuration may be for a common reference clock for each port, or for separate reference clocks used independently by each port. The memory system may exchange signaling with two or more host systems via two or more ports of the set of ports in accordance with the clocking configuration.
A memory system, comprising:
A method by a memory system, comprising:
A non-transitory computer-readable medium storing code comprising instructions which, when executed by one or more processors of a memory system, cause the memory system to:
Dependencies are inferred from the claim text.