Atomic operations implemented using memory services of data storage devices
AssigneeMicron Technology, Inc.
InventorLuca Bert
Life of this patent
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AssigneeMicron Technology, Inc.
InventorLuca Bert
Estimating the term…
A computing device having a computer express link (CXL) connection between a memory sub-system and a host system and a flag configured to indicate an atomic operation being in progress in the memory sub-system. Over the connection, the memory sub-system can attach a portion of its fast, random access memory as a memory device, and a non-volatile memory as a storage device. The flag is set in the memory device accessible to the host system via a cache-coherent memory access protocol, before execution of commands of the atomic operation. After the completion of the atomic operation, the flag is cleared off the memory device. During a recovery from an interruption, the host system can check the flag to decide whether to restart or start the atomic operation again, or undo the partially executed the atomic operation.
A memory sub-system, comprising:
A method, comprising:
A non-transitory computer storage medium storing instructions which, when executed in a computing system, cause the computing system to perform a method, comprising:
Dependencies are inferred from the claim text.