Semiconductor Device and Method of Forming Fan-Out Wafer Level CPO with Through Silicon Conductive Via

A semiconductor device, comprising:

• a first electrical component including a coupler formed on a first surface of the first electrical component;
• an encapsulant deposited around the first electrical component;
• a conductive via formed through the first electrical component;
• a first interconnect structure formed over the first surface of the first electrical component outside the coupler;
• and
• a second interconnect structure formed over a second surface of the first electrical component opposite the first surface of the first electrical component.

A method of making a semiconductor device, comprising:

• providing a first electrical component including a coupler formed on a first surface of the first electrical component;
• depositing an encapsulant over and around the first electrical component;
• forming a conductive via through the first electrical component;
• forming a cavity in the encapsulant over the first surface of the first electrical component;
• forming a first interconnect structure formed within the cavity of the encapsulant over the first surface of the first electrical component outside the coupler;
• and
• forming a second interconnect structure over a second surface of the first electrical component opposite the first surface of the first electrical component.

A method of making a semiconductor device, comprising:

• providing a first electrical component including a coupler formed on a first surface of the first electrical component;
• depositing an encapsulant around the first electrical component;
• forming a conductive via through the first electrical component;
• forming a first interconnect structure over the first surface of the first electrical component outside the coupler;
• and
• forming a second interconnect structure over a second surface of the first electrical component opposite the first surface of the first electrical component.