Legacy pinball machine wifi retrofit device
AssigneeWarped Pinball LLC
InventorPaul Steven Mullin
Life of this patent
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Abstract
A circuit board including a first connector configured to be communicatively coupled to a processor, wherein program instructions are executed on the processor in accordance with a predetermined operational timing and control flow. The circuit board further includes a second connector configured to be communicatively coupled to a main circuit board, and circuitry electrically connected between the first connector and the second connector. The circuitry is configured to pass, via a first mode of operation, signals from the processor to the circuit board, and selectively provide, via a second mode of operation, data from the circuit board to the processor.
Claims22
A device comprising:
- a circuit board including:
- a first connector configured to be communicatively coupled to a processor, wherein program instructions are executed on the processor in accordance with a predetermined operational timing and control flow;
- a second connector configured to be communicatively coupled to a main circuit board;
- and
- circuitry electrically connected between the first connector and the second connector, wherein the circuitry is configured to:
- pass, via a first mode of operation, signals from the processor to the circuit board;
- and
- selectively provide, via a second mode of operation, data from the circuit board to the processor.
A method comprising:
- at a device including circuitry electrically connected between a first connector and a second connector, wherein the first connector is communicatively coupled to a processor and the second connector is operatively coupled to a main circuit board:
- passing through, by the circuitry, processor signals during a first mode of operation;
- and
- selectively providing, by the circuitry, in response to at least a subset of the processor signals and based thereon, data to the processor in a second mode of operation,
- wherein program instructions are executed by the processor in accordance with a predetermined operational timing and control flow based on selected data from the circuitry.
Dependencies are inferred from the claim text.