Chip package and circuit device for virtual currency computation
AssigneeBitdeer Semiconductor Technology PTE. LTD.
InventorQIANG DAI
Life of this patent
Estimating the term…
Abstract
Disclosed are a chip package and a circuit device for virtual currency computation. The die power terminals and the die signal terminals of a die in the chip package are respectively soldered to the substrate power terminals and the substrate signal terminals of a package substrate; a thickness of the metal plating layer is less than that of the first metal piece and a thickness of the second metal piece, and an area of the metal plating layer is less than that of the first metal piece and an area of the second metal piece. A projection of the metal plating layer is located within the first metal piece, and the die is electrically isolated from both the first metal piece and the second metal piece.
Claims20
A chip package for virtual currency computation, comprising:
- a package substrate comprising substrate power terminals and substrate signal terminals arranged on a surface thereof, the substrate power terminal comprising a substrate positive power terminal and a substrate negative power terminal;
- and
- a die comprising die power terminals and die signal terminals arranged on an upper surface thereof, the die power terminals and the die signal terminals being soldered to the substrate power terminals and the substrate signal terminals respectively;
- wherein a protruding portion surrounding a periphery of the die and protruding in relative to the die is arranged on the package substrate, the protruding portion comprises a plurality of chip signal terminals, a first metal piece, and a second metal piece arranged on a surface thereof;
- the substrate signal terminals are electrically connected to the chip signal terminals via conductive traces inside the package substrate;
- each of the first metal piece and the second metal piece are electrically connected to the substrate positive power terminal and the substrate negative power terminal respectively via a respective conductive trace inside the package substrate;
- a metal plating layer is disposed on a lower surface of the die, wherein a thickness of the metal plating layer is less than a thickness of the first metal piece and a thickness of the second metal piece, and an area of the metal plating layer is less than an area of the first metal piece and an area of the second metal piece;
- a projection of the metal plating layer on a surface where the first metal piece is disposed is located within the first metal piece, and the die is electrically isolated from both the first metal piece and the second metal piece;
- and
- the metal plating layer, the first metal piece, the second metal piece, and the chip signal terminals are configured to be soldered to a surface on one side of a metal-based circuit board.
A circuit device for virtual currency computation, comprising:
- a metal-based circuit board and a chip package for virtual currency computation;
- wherein
- the chip package for virtual currency computation comprises a package substrate comprising substrate power terminals and substrate signal terminals, and a die comprising die power terminals and die signal terminals being connected to the substrate power terminals and the substrate signal terminals respectively, the substrate power terminal comprises a substrate positive power terminal and a substrate negative power terminal;
- wherein a protruding portion is arranged on the package substrate and surround a periphery of the die, the protruding portion comprises a plurality of chip signal terminals, a first metal piece and a second metal piece, which are electrically connected to the substrate signal terminals, the substrate positive power terminal and the substrate negative power terminal respectively via conductive traces inside the package substrate;
- a metal plating layer is arranged on a surface of the die, a projection of the metal plating layer is located within the first metal piece, and the die is electrically isolated from both the first metal piece and the second metal piece;
- the metal-based circuit board comprises a metal substrate, wherein a thermal separation boss is disposed on the metal substrate, and an insulating layer is disposed on a surface of the metal substrate other than the thermal separation boss, a conductive layer being disposed on the insulating layer, the conductive layer comprising a first power pad, a second power pad, and a plurality of signal pads;
- and
- the metal plating layer is soldered to the thermal separation boss;
- wherein the first metal piece, the second metal piece, and the chip signal terminals are respectively soldered to the first power pad, the second power pad, and the signal pads.
A circuit device for virtual currency computation, comprising:
- a metal-based circuit board and a chip package for virtual currency computation;
- wherein the chip package for virtual currency computation comprises a package substrate comprising substrate power terminals and substrate signal terminals, and a die comprising die power terminals and die signal terminals being connected to the substrate power terminals and the substrate signal terminals respectively, the substrate power terminal comprises a substrate positive power terminal and a substrate negative power terminal;
- wherein a protruding portion is arranged on the package substrate and surround a periphery of the die, the protruding portion comprises a plurality of chip signal terminals, a first metal piece and a second metal piece, which are electrically connected to the substrate signal terminals, the substrate positive power terminal and the substrate negative power terminal respectively via conductive traces inside the package substrate;
- a metal plating layer is arranged on a surface of the die, a projection of the metal plating layer is located within the first metal piece, and the die is electrically isolated from both the first metal piece and the second metal piece;
- wherein the metal-based circuit board comprises a metal substrate, wherein an insulating layer is disposed on a surface of the metal substrate, a conductive layer being disposed on the insulating layer, the conductive layer comprising a heat dissipation pad, a first power pad, a second power pad, and a plurality of signal pads;
- wherein the metal plating layer, the first metal piece, the second metal piece, and the chip signal terminals are respectively soldered to the heat dissipation pad, the first power pad, the second power pad, and the signal pads.
Dependencies are inferred from the claim text.