Custom rf inductors for rf modules

A method of manufacturing a radio frequency (RF) package, comprising:

• providing a laminate having an inductor integrated into the laminate;
• dicing the laminate to provide form a surface mount device with a device laminate that includes the inductor, the surface mount device being dimensioned so as to fit within a bounded physical area;
• mounting an electronic component on a mounting surface of a package laminate, a metallic structure being integrated into the package laminate;
• and
• mounting the surface mount device to the mounting surface, wherein the bounded physical area is defined by at least one of a surface of the electronic component and the metallic structure that defines a boundary of the bounded physical area.

A user element comprising a radio frequency (RF) package, the RF package comprising:

• a package laminate, comprising:
• a first laminate substrate defining a mounting surface;
• and
• a metallic structure integrated with the first laminate substrate;
• an electronic component mounted to the mounting surface of the first laminate substrate;
• a surface mount device mounted to the mounting surface, the surface mount device comprising:
• a second laminate substrate;
• and
• an inductor integrated with the second laminate substrate;
• and
• a bounded physical area defined by at least one of a surface of the electronic component and the metallic structure that defines a boundary of the bounded physical area, the surface mount device being dimensioned so as to fit within the bounded physical area.

A method of designing a surface mount device, the method comprising:

• defining an available surface area for fitting an in silico surface mount device based on adjacent in silico components on the an in silico package substrate of an in silico RF package;
• identifying in silico grounds and components of an in silico metallic structure surrounding the available surface area so that a performance of an in silico inductor of the in silico surface mount device can be optimized by reducing parasitic capacitance;
• performing electromagnetic simulations of in silico surface mount devices from a data library to select one or more candidate in silico surface mount devices based on the electromagnetic simulations. wherein each of the one or more candidate in silico surface mount devices has been dimensioned to fit within the available physical area;
• and
• empirically verifying at least one physical surface mount device that is formed in accordance with at least one of the one or more candidate in silico surface mount devices to determine whether the at least one physical surface mount device meets the design specifications.