Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing-Chou CHIANG, Hung-Yi HUANG, Chih-Yi CHANG, Ming-Hsing TSAI, Chun-Chieh LIN
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Abstract
A method includes forming at least one semiconductor component in a semiconductor device component region over a substrate. An interconnect structure including at least one contact disposed in an insulating layer is formed over the semiconductor device component region. A conductive layer is formed over the interconnect structure. The conductive layer is annealed. The annealed conductive layer is etched to form a trench in the conductive layer. A remaining portion of the conductive layer overlaps the contact in the interconnect structure. A dielectric layer is formed in the trench.
Claims19
A method comprising:
- forming at least one semiconductor component in a semiconductor device component region over a substrate;
- forming an interconnect structure comprising at least one contact disposed in an insulating layer over the semiconductor device component region;
- forming a conductive layer over the interconnect structure;
- annealing the conductive layer;
- etching the annealed conductive layer to form a trench in the conductive layer,
- wherein a remaining portion of the conductive layer overlaps the contact in the interconnect structure;
- and
- forming a dielectric layer in the trench.
A method of manufacturing a semiconductor device, comprising:
- forming at least one transistor in a semiconductor device component region over a substrate;
- forming an interconnect structure including an insulating layer over the semiconductor device component region;
- forming at least one conductive contact in the insulating layer;
- depositing a metal layer over the insulating layer;
- increasing an average grain size of the metal layer;
- after increasing the average grain size of the metal layer, forming a trench in the metal layer,
- wherein at least one remaining portion of the metal layer overlaps the at least one conductive contact in the insulating layer;
- and
- forming a dielectric layer in the trench,
- wherein the dielectric layer includes a second dielectric layer over a first dielectric layer and the first and second dielectric layers have a different dielectric constant.
A structure, comprising:
- a semiconductor device disposed on a substrate;
- an interconnect structure comprising at least one contact disposed in an insulating layer over the semiconductor device;
- a conductive layer disposed over the interconnect structure,
- wherein the conductive layer comprises a plurality of metal structures spaced apart by a non-metal region, and
- the metal structures comprise a first metal having a first average grain size;
- a first liner layer disposed in the non-metal region on sidewalls of the metal structures;
- a dielectric layer disposed in the non-metal region over the first liner layer,
- wherein the dielectric layer and the liner layer are made of different materials;
- and
- an interlayer dielectric layer disposed over the conductive layer,
- wherein the interlayer dielectric layer includes at least one wiring layer embedded in the interlayer dielectric layer, and
- a second liner layer disposed between the wiring layer and the interlayer dielectric layer,
- the second liner layer comprising the first metal having a second average grain smaller than the first average grain size.
Dependencies are inferred from the claim text.