Integrated junction silicide and selective metal capping with pullback

A method of forming a contact structure on a semiconductor substrate, comprising:

• forming a metal silicide layer over a surface of the contact structure, wherein:
• the contact structure comprises a feature formed in a surface of the semiconductor substrate;
• the feature comprises a bottom surface and sidewall surfaces that define an opening, which comprise a dielectric material;
• and
• the metal silicide layer is formed over the sidewall surfaces and the bottom surface;
• performing a selective etch process, the selective etch process comprising:
• a deposition operation, wherein the deposition operation comprises forming a carbon-containing passivation layer over the metal silicide layer;
• a trim operation, wherein the trim operation comprises exposing the carbon-containing passivation layer to a first hydrogen plasma so that a first portion of the carbon-containing passivation layer is etched away exposing at least a first portion of the metal silicide layer formed over the sidewall surfaces while a second portion of the carbon-containing passivation layer remains over a second portion of the metal silicide layer formed over the bottom surface;
• an etch operation, wherein the etch operation comprises exposing the first portion of the metal silicide layer formed over the sidewall surfaces to an etchant gas to remove the first portion of the metal silicide layer formed over the sidewall surfaces;
• and
• a carbon removal operation, wherein the carbon removal operation comprises exposing the second portion of the carbon-containing passivation layer to a second hydrogen plasma so that the second portion of the carbon-containing passivation layer is removed exposing the second portion of the metal silicide layer formed over the bottom surface;
• and
• depositing a metal gapfill material over the second portion of the metal silicide layer formed over the bottom surface.

A processing system, comprising:

• a first processing chamber;
• and
• a system controller, comprising:
• a memory for storing computer readable instructions;
• and
• a processor coupled to the memory, the processor configured by the computer readable instructions that when executed by the processor perform a plurality of operations, comprising:
• depositing a carbon-containing passivation layer over a metal silicide layer, the metal silicide layer formed over a bottom surface and sidewall surfaces that define an opening of a feature formed on a semiconductor substrate;
• trimming the carbon-containing passivation layer by exposing the carbon-containing passivation layer to a first hydrogen plasma so that a first portion of the carbon-containing passivation layer is etched away exposing at least a first portion of the metal silicide layer formed over the sidewall surfaces while a second portion of the carbon-containing passivation layer remains over the bottom surface;
• exposing the first portion of the metal silicide layer to an etchant gas to remove the first portion of the metal silicide layer formed over the sidewall surfaces;
• and
• exposing the second portion of the carbon-containing passivation layer remaining over the bottom surface to a second hydrogen plasma so that the second portion of the carbon-containing passivation layer is removed exposing the second portion of the metal silicide layer formed over the bottom surface.