Low mass ion etch for cavity shaping engineering for cmos devices
AssigneeApplied Materials, Inc.
InventorsJohn SPORRE, Sivanandha Krishnan KANAKASABAPATHY
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Abstract
A method of forming an electrical contact in a semiconductor structure includes performing a cavity shaping process to form a cavity in an exposed surface of an epitaxially grown region within a contact trench in a dielectric layer formed over a semiconductor region, the cavity shaping process including a reactive ion etching (RIE) process using a process gas consisting of an etch gas and a supporting inert gas including species less than 40 atomic mass (amu), and performing a selective epitaxial deposition process to form a contact epitaxial layer on an exposed surface of the cavity.
Claims20
A method of forming an electrical contact in a semiconductor structure, comprising:
- performing a cavity shaping process to form a cavity in an exposed surface of an epitaxially grown region within a contact trench in a dielectric layer formed over a semiconductor region, the cavity shaping process comprising:
- a reactive ion etching (RIE) process using a process gas consisting of an etch gas and a supporting inert gas including species less than 40 atomic mass (amu);
- and
- performing a selective epitaxial deposition process to form a contact epitaxial layer on an exposed surface of the cavity.
A method of forming an electrical contact in a semiconductor structure, comprising:
- performing a first selective epitaxial deposition process to form a source/drain (S/D) region in a contact trench in a dielectric layer formed on a semiconductor region;
- performing a cavity shaping process to form a cavity in an exposed surface of the S/D region within the contact trench, the cavity shaping process comprising:
- a reactive ion etching (RIE) process using a process gas consisting of an etch gas and a supporting inert gas including species less than 40 atomic mass (amu);
- performing a second selective epitaxial deposition process to form a contact epitaxial layer on an exposed surface of the cavity;
- performing a silicide forming process to form a cavity contact over the contact epitaxial layer within the contact trench;
- and
- performing a metal filling process to form a contact plug in the contact trench.
A method of forming an electrical contact in a semiconductor structure, comprising:
- performing a first selective epitaxial deposition process to form a source/drain (S/D) region in a contact trench in a dielectric layer formed on a semiconductor region;
- performing a cavity shaping process to form a cavity in an exposed surface of the S/D region within the contact trench, the cavity shaping process comprising:
- a reactive ion etching (RIE) process using a process gas consisting of an etch gas and a supporting inert gas including species less than 40 atomic mass (amu);
- performing a second selective epitaxial deposition process to form a contact epitaxial layer on an exposed surface of the cavity;
- performing a silicide forming process to form a cavity contact over the contact epitaxial layer within the contact trench;
- performing a blanket deposition process to form a barrier layer on exposed inner surfaces of the contact trench and on the exposed surface of the dielectric layer;
- and
- performing a metal filling process to form a contact plug in the contact trench.
Dependencies are inferred from the claim text.