Back to results
US 2026/0293547 A1Published application
Methods of forming semiconductor device structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShahaji B. MORE, Chien LIN
Life of this patent
Estimating the term…
Abstract
A method for forming a semiconductor device structure is described. The method includes forming a first semiconductor layer over a substrate in a processing chamber and performing a purge process. The purge process includes flowing a chlorine-containing gas into the processing chamber. The method further includes forming a second semiconductor layer over the first semiconductor layer, and an interface region is formed between the first and second semiconductor layers.
Claims20
A method, comprising:
- forming a first semiconductor layer over a substrate in a processing chamber, the first semiconductor layer comprising silicon germanium;
- exposing the first semiconductor layer to a chlorine-containing gas;
- and
- forming a second semiconductor layer over the first semiconductor layer, wherein a first interface region is formed between the first semiconductor layer and the second semiconductor layer;
- forming a third semiconductor layer over the second semiconductor layer;
- and
- forming a fourth semiconductor layer over the third semiconductor layer, wherein a second interface region is formed between the third semiconductor layer and the fourth semiconductor layer, and a thickness of the second interface region is greater than a thickness of the first interface region.
4 more elements
A method, comprising:
- forming a first semiconductor layer over a substrate in a processing chamber;
- performing a first purge process for a first time duration, wherein the first time duration ranges from about 3 seconds to about 15 seconds;
- forming a second semiconductor layer different from the first semiconductor layer over a surface of the first semiconductor layer, wherein a first interface region is formed between the first and second semiconductor layers;
- performing a second purge process for a second time duration substantially less than the first time duration;
- and
- forming a third semiconductor layer different from the second semiconductor layer over the second semiconductor layer, wherein a second interface region is formed between the second and third semiconductor layers.
3 more elements
A method, comprising:
- forming a plurality of first semiconductor layers and a plurality of second semiconductor layers over a substrate, wherein a purge process is performed after the formation of at least one of the plurality of first semiconductor layers, and the purge process removes germanium ions from a surface of the at least one of the plurality of first semiconductor layers;
- removing portions of the plurality of first semiconductor layers and the plurality of second semiconductor layers to form a fin;
- forming a sacrificial gate stack over a portion of the fin;
- removing exposed portions of the fin to expose portions of the substrate;
- forming source/drain epitaxial features on the exposed portions of the substrate;
- removing the sacrificial gate stack;
- and
- removing the plurality of first semiconductor layers.
5 more elements
Dependencies are inferred from the claim text.