Methods of reducing capacitance in field-effect transistors
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Han Chen, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
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Abstract
A semiconductor structure includes a fin protruding from a substrate, a first and a second metal gate stacks disposed over the fin, and a dielectric feature defining a sidewall of each of the first and the second metal gate stacks. Furthermore, the dielectric feature includes a two-layer structure, where sidewalls of the first layer are defined by the second layer, and where the first and the second layers have different compositions.
Claims20
A semiconductor structure, comprising:
- an active region over a substrate and extending lengthwise along a first direction;
- a first gate structure disposed over the active region and extending lengthwise along a second direction different from the first direction;
- a second gate structure aligned lengthwise with the first gate structure;
- a first isolation structure disposed adjacent to the first gate structure along the first direction;
- a second isolation structure intersecting with the first isolation structure and disposed between the first gate structure and the second gate structure along the second direction, wherein the second isolation structure comprises a first layer and a second layer, and a dielectric constant of the first layer is different from a dielectric constant of the second layer.
A semiconductor structure, comprising:
- a protruding structure over a substrate;
- an isolation feature alongside the protruding structure;
- a gate structure extending over the protruding structure and the isolation feature;
- a source/drain feature adjacent to the gate structure, wherein the source/drain feature overhangs the isolation feature;
- a first dielectric feature extending into the protruding structure, wherein the source/drain feature is disposed between the first dielectric feature and the gate structure and comprises an air gap enclosed by a dielectric layer;
- and
- a second dielectric feature extending through the gate structure and spaced apart from the protruding structure, wherein a portion of the second dielectric feature is disposed over the isolation feature, and when viewed from top, the first dielectric feature extends from the second dielectric feature.
A semiconductor structure, comprising:
- a first active region and a second active region extending lengthwise along a first direction;
- an isolation feature disposed between the first active region and the second active region;
- a first gate structure over the first active region and the second active region and extending lengthwise along a second direction different from the first direction;
- a second gate structure over the first active region and the second active region and extending lengthwise along the second direction;
- and
- a dielectric structure comprising a first portion extending through the first active region and the second active region and a second portion configured to provide isolation between the first gate structure and the second gate structure, and the second portion comprises a dielectric feature enclosed by a dielectric layer.
Dependencies are inferred from the claim text.