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US 2026/0293202 A1Published application
Semiconductor Device and Method of Manufacturing
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorShyh-Shin Ferng
Life of this patent
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Abstract
Gate-all-around (GAA) devices and methods of manufacturing such devices are described herein. A method includes forming a multi-layer structure over a substrate and forming a plurality of source/drain regions in the multi-layer structure. Fins are then patterned into the multi-layer structure through adjacent source/drain regions. A wire release process is performed to remove materials of one or more of the layers in the multi-layer stack. The remaining layers of the multi-layer stack form a stack of nanostructures connecting adjacent source/drain regions of the fins.
Claims20
A semiconductor device comprising:
- a first epitaxial source/drain region;
- a second epitaxial source/drain region, wherein an upper surface of the first epitaxial source/drain region is substantially co-planar with an upper surface of the second epitaxial source/drain region;
- a stack of nanostructures, each nanostructure within the stack of nanostructures extending between the first epitaxial source/drain region and the second epitaxial source/drain region, wherein a first plane extends vertically through the first epitaxial source/drain region, the second epitaxial source/drain region and the stack of nanostructures, wherein the first epitaxial source/drain region has an upper portion and a bottom portion below the upper portion, wherein a width of the upper portion and a width of the bottom portion are substantially the same in a second plane, wherein the second plane is perpendicular to the first plane;
- a gate structure comprising a gate dielectric layer and a gate electrode over the gate dielectric layer, the gate dielectric layer surrounding each nanostructure within the stack of nanostructures;
- and
- a gate spacer adjacent the gate structure, an entirety of the gate spacer being over an uppermost surface of the first epitaxial source/drain region in the first plane.
3 more elements
A semiconductor device comprising:
- a base fin protruding from a semiconductor substrate;
- a channel region over the base fin;
- an isolation region along opposing sides of the base fin;
- a gate structure over the channel region, the gate structure comprising:
- a gate dielectric over the channel region;
- and
- a gate electrode over the gate dielectric;
- a first source/drain region in contact with the channel region and the gate dielectric, wherein the first source/drain region has substantially vertical sidewalls in a first cross-sectional view, wherein the first cross-sectional view is parallel to a lengthwise direction of the gate electrode, wherein a center of the first source/drain region is above an upper surface of the isolation region;
- and
- a gate spacer on a sidewall of the gate structure, wherein a lowermost surface of the gate spacer is vertically over an uppermost surface of the first source/drain region in a second cross-sectional view, wherein the second cross-sectional view extends through the channel region in a channel length direction.
7 more elements
A semiconductor device comprising:
- a gate structure, the gate structure comprising:
- a gate dielectric surrounding a first nanostructure and a second nanostructure over a semiconductor substrate;
- and
- a gate electrode surrounding the gate dielectric;
- a first source/drain region in physical contact with the first nanostructure and the second nanostructure, the first source/drain region extending into the semiconductor substrate, wherein the first source/drain region has a substantially rectangular prism shape in a perspective view;
- and
- a spacer layer on a sidewall of the gate structure, wherein a lowermost surface of the spacer layer directly contacts an uppermost surface of the first source/drain region in a first cross-sectional view, wherein the first cross-sectional view extends through the first nanostructure and the second nanostructure in a channel length direction.
4 more elements
Dependencies are inferred from the claim text.