Thin-film transistors with gate-source capacitance tuning

A thin-film transistor comprising a stack of layers formed of:

• a layer of source material;
• a layer of drain material;
• a layer of semiconductor channel material between the layer of source material and the layer of drain material;
• a layer of gate dielectric material in contact with the layer of semiconductor channel material;
• a layer of encapsulation material in contact with the layer of gate dielectric material;
• and
• a layer of conductive gate material in contact with the layer of encapsulation material, the layer of conductive gate overlapping the layer of source material, the layer of drain material, or both the layers of source and drain material;
• wherein the encapsulation material is operable to tune an overlap capacitance between the layer of conductive gate material and the overlapping layer of source material, layer of drain material, or both layers of source and drain material.

A thin-film transistor comprising a stack of layers formed of:

• a layer of source material;
• a layer of drain material;
• a layer of semiconductor channel material between the layer of source material and the layer of drain material;
• a layer of gate dielectric material in contact with the layer of semiconductor channel material;
• a layer of encapsulation material in contact with the layer of gate dielectric material;
• and
• a layer of conductive gate material in contact with the layer of encapsulation material, the layer of conductive gate overlapping both the layers of source and drain material;
• wherein the encapsulation material is operable to tune an overlap capacitance between the layer of conductive gate material and the overlapping layers of source and drain material.

A method of making a thin-film transistor, the method comprising forming a stack of layers by:

• forming a layer of source material;
• forming a layer of drain material;
• forming a layer of semiconductor channel material between the layer of source material and the layer of drain material;
• forming a layer of gate dielectric material in contact with the layer of semiconductor channel material;
• forming a layer of encapsulation material in contact with the layer of gate dielectric material;
• and
• forming a layer of conductive gate material in contact with the layer of encapsulation material, the layer of conductive gate overlapping the layer of source material, the layer of drain material, or both the layers of source and drain material;
• wherein the encapsulation material is operable to tune an overlap capacitance between the layer of conductive gate material and the overlapping layer of source material, layer of drain material, or both layers of source and drain material.