Digital clock frequency tracker and high-speed serial interface chip

A digital clock frequency tracker, comprising:

• a counter-based frequency discriminator, configured to acquire a recovered clock signal obtained by frequency-dividing a clock signal recovered by a clock-data recovery circuit at a receiving end, and a local clock signal obtained by frequency-dividing a clock signal generated by a phase-locked loop at a transmitting end, set corresponding target values according to a frequency ratio of the recovered clock signal to the local clock signal, sample a count value of the recovered clock signal after a count value of the local clock signal reaches the corresponding target value, and obtain frequency offset information by comparing the count value of the recovered clock signal with the count value of the local clock signal;
• a phase detector, configured to receive the divided recovered clock signal and the divided local clock signal, set a frequency division coefficient according to the frequency ratio of the recovered clock signal to the local clock signal, perform oversampling on the recovered clock signal using the local clock signal according to the frequency division coefficient, and obtain phase information based on sampling results;
• and
• a digital low-pass filter, configured to generate a frequency control word according to the frequency offset information and the phase information and their respective gains, and output the frequency control word to the phase-locked loop at the transmitting end.