Power amplifier circuit
AssigneeMurata Manufacturing Co., Ltd.
InventorsMakoto ITOU, Makoto TABEI
Life of this patent
Estimating the term…
Abstract
To keep characteristics of a power amplifier circuit with no influence on cost. The power amplifier circuit includes amplifier units of multiple stages. The power amplifier circuit includes a first amplifier unit that amplifies a radio-frequency signal that is inputted, a second amplifier unit that amplifies an output from the first amplifier unit, and a switch portion provided on a power supply path to the first amplifier unit. Power is supplied to the first amplifier unit via the switch portion. The switch portion sets power supply to the first amplifier unit to ON or OFF. The power is directly supplied to the second amplifier unit not via the switch portion.
Claims10
A power amplifier circuit including amplifiers of multiple stages, the power amplifier circuit comprising:
- a first amplifier configured to amplify a radio-frequency signal that is input;
- a second amplifier configured to amplify an output from the first amplifier;
- and
- a switch on a power supply path to the first amplifier,
- wherein a power is selectively supplied to the first amplifier via the switch, and
- wherein the power is directly supplied to the second amplifier without passing through the switch.
A power amplifier circuit including an amplifier of only one stage, the power amplifier circuit comprising:
- a first amplifier configured to amplify a radio-frequency signal that is input;
- and
- a switch on a power supply path to the first amplifier,
- wherein power is supplied to the first amplifier via the switch,
- wherein the first amplifier comprises:
- an input terminal into which the radio-frequency signal to be amplified is inputted,
- a first field effect transistor having a gate to which the radio-frequency signal inputted into the input terminal is applied,
- a second field effect transistor connected between a power supply and a reference potential with the first field effect transistor,
- an output terminal between the second field effect transistor and a load, and configured to output an amplified signal, and
- a resistor divider circuit configured to generate a bias applied to a gate of the second FET, and
- wherein the first field effect transistor is cascode-connected to the second field effect transistor by connecting a drain to an adjacent source.
Dependencies are inferred from the claim text.