Back to results
US 2026/0291447 A1Published application
Zero-common-mode modulation with digital feedback to damp common-mode resonance and suppress cross-over distortion
AssigneeMonolithic Power Systems, Inc.
InventorsTimo Adrianus Fake VAN DOESUM, Christiaan Egidius LOKIN, Daniel SCHINKEL, Olaf Robin Christiaan VAN DER MEER
Life of this patent
Estimating the term…
Abstract
The present invention is in the field of basic electronic circuitry, in particular for an audio amplifier, more in particular a class-D amplifier, such as for use in a digital audio converter and digital amplifier controller, a chip comprising said audio amplifier, and a device comprising said audio amplifier or said chip
Claims20
A digital control loop for a signal amplifier, in particular for an audio amplifier, more in particular for a Class D amplifier, comprising
- at least one input configured to receive a digital electronic signal, the at least one input configured to provide input to
- at least one first adder, wherein the at least one first adder is configured to provide input to
- at least one differential-mode loop filter (DMLF), wherein the at least one DMLF is configured to provide input to
- at least one second adder and to at least one third adder,
- wherein the second adder is configured to provide input to
- at least one first Pulse Width Modulator (PWM), the first PWM con-figured to provide output,
- wherein the third adder is configured to provide input to
- at least one second Pulse Width Modulator (PWM), the second PWM configured to provide output,
- at least one common-mode loop filter (CMLF), wherein the CMLF is configured to provide input to the at least one second adder and to the at least one third adder,
- at least one Low Latency Analog to Digital Converter (LLADC), where-in the at least one LLADC is configured to provide input to the at least one first adder and to provide input to the at least one CMLF, and configured to receive input from at least one output filter, and
- at least one differential clip controller (DCC), the at least one DCC con-figured to receive input from the at least one second adder and the at least one third adder and to provide output to the at least one first Pulse Width Modulator (PWM) and the at least one second Pulse Width Modulator (PWM),
- wherein the digital control loop is configured to provide substantially zero-common-mode modulation.
9 more elements
Dependencies are inferred from the claim text.