Memory system, control method, and memory controller
AssigneeKioxia Corporation
InventorMasayasu KAWASE
Life of this patent
Estimating the term…
Abstract
A memory system to which power is supplied from an external power supply and includes a non-volatile memory and a controller. The non-volatile memory includes a plurality of memory cells. The controller writes data to a first memory cell among the plurality of memory cells in a first mode in which data is stored using a first number of bits. In response to a duration of power cutoff from the external power exceeding a threshold, the controller performs a first operation. In the first operation, the data is read from the first memory cell, and the read data is rewritten to a second memory cell among the plurality of memory cells in a second mode in which data is stored using a second number of bits. The second number of bits is smaller than the first number of bits.
Claims20
A memory system to which power is supplied from an external power supply, the memory system comprising:
- a non-volatile memory including a plurality of memory cells;
- and
- a controller configured to:
- write data to a first memory cell among the plurality of memory cells in a first mode in which data is stored using a first number of bits, and,
- in response to a duration of power cutoff from the external power supply exceeding a threshold, perform a first operation of reading the data from the first memory cell and rewriting the read data to a second memory cell among the plurality of memory cells in a second mode in which data is stored using a second number of bits smaller than the first number of bits.
A control method for a memory system that includes a non-volatile memory including a plurality of memory cells and that is supplied with power from an external power supply, the method comprising:
- writing data to a first memory cell among the plurality of memory cells in a first mode in which data is stored using a first number of bits;
- monitoring a duration of power cutoff from the external power supply;
- and
- in response to the duration of power cutoff from the external power supply exceeding a threshold, performing a first operation of reading the data from the first memory cell and rewriting the read data to a second memory cell among the plurality of memory cells in a second mode in which data is stored using a second number of bits smaller than the first number of bits.
A memory controller for controlling a non-volatile memory having a plurality of memory cells, the memory controller comprising:
- a memory interface configured to communicate with the non-volatile memory;
- and
- a control circuit coupled to the memory interface, the control circuit configured to:
- instruct the memory interface to write data to a first region of a part of the plurality of memory cells of the non-volatile memory in a first mode in which data is stored with a first number of bits per memory cell;
- and
- in response to detecting that a power-off duration of the non-volatile memory has exceeded a threshold, instruct the memory interface to read the data from the first region and write the read data to a second region of another part of the plurality of memory cells of the non-volatile memory in a second mode in which data is stored with a second number of bits per memory cell, the second number of bits being fewer than the first number of bits.
Dependencies are inferred from the claim text.