3d-dram with open digit line quilt layout
AssigneeMicron Technology, Inc.
InventorHiroki Fujisawa
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AssigneeMicron Technology, Inc.
InventorHiroki Fujisawa
Estimating the term…
A 3D memory device includes multiple memory patches each of which includes a 3D array of memory cells arranged at the intersection of word lines running in a first direction, local digit lines (LDLs) running in a second direction, and global digit lines (GDLs) running in a third direction. The memory device includes a number of ‘quilts’ each of which includes four memory patches arranged in a 2x2 grid. The sense amplifiers are positioned along the border between patches in the third direction. Adjacent sense amplifiers are couple to adjacent GDLs in the two associated patches. In some embodiments, the sense amplifiers are positioned above the memory patches in the second direction. In some embodiments, multiplexer drivers are also positioned above the array. The quilts may be relatively compact and don’t have sense amplifiers along their edges, allowing for easier tiling at the edge of the device.
An apparatus comprising:
An apparatus comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.