Cascaded serial chain connection of device driver circuits
OwnerYanqin Cao, Chih Pu Yeh +2inventors
InventorsYanqin Cao, Chih Pu Yeh, Feiyang Gong, Sheng Guo
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Abstract
An apparatus comprises a plurality of device driver circuits, each configurable to drive one or more devices of a specific type, wherein the plurality of device driver circuits are serially connected in a chain connection, and wherein each of the plurality of device driver circuits includes a data input pin configurable to receive a data input signal, a clock input pin configurable to receive a clock input signal, a data output pin configurable to transmit a data output signal, a clock output pin configurable to transmit a clock output signal, and an inverter configurable to generate the clock output signal by inverting the clock input signal.
Claims25
An apparatus comprising:
- a plurality of device driver circuits, each configurable to drive one or more devices of a specific type, wherein the plurality of device driver circuits are serially connected in a chain connection, and wherein
- each of the plurality of device driver circuits includes
- a data input pin configurable to receive a data input signal;
- a clock input pin configurable to receive a clock input signal;
- a data output pin configurable to transmit a data output signal;
- a clock output pin configurable to transmit a clock output signal;
- and
- an inverter configurable to generate the clock output signal by inverting the clock input signal.
An apparatus comprising:
- a plurality of device driver circuits, each configurable to drive one or more devices of a specific type, wherein the plurality of device driver circuits are serially connected in a chain connection, and wherein
- each of the plurality of device driver circuits includes
- a data input pin configurable to receive a data input signal;
- a clock input pin configurable to receive a clock input signal;
- a data output pin configurable to transmit a data output signal;
- a clock output pin configurable to transmit a clock output signal;
- and
- a circuitry configurable to
- determine a timeout period of the input clock signal;
- and
- reset the each of the plurality of device driver circuits if the timeout period of its input clock signal exceeds a preset timeout threshold.
A method, comprising:
- receiving a data input signal at each of a plurality of device driver circuits each configurable to drive one or more devices of a specific type, wherein the plurality of device driver circuits are serially connected in a chain connection;
- receiving a clock input signal at the each of a plurality of device driver circuits;
- transmitting a data output signal at the each of a plurality of device driver circuits;
- and
- transmitting a clock output signal at the each of a plurality of device driver circuits, wherein the clock output signal is inverted from the clock input signal.
A method, comprising:
- receiving a data input signal at each of a plurality of device driver circuits each configurable to drive one or more devices of a specific type, wherein the plurality of device driver circuits are serially connected in a chain connection;
- receiving a clock input signal at the each of a plurality of device driver circuits;
- transmitting a data output signal at the each of a plurality of device driver circuits;
- transmitting a clock output signal at the each of a plurality of device driver circuits;
- determining a timeout period of the input clock signal;
- and
- resetting the each of the plurality of device driver circuits if the timeout period of its input clock signal exceeds a preset timeout threshold.
Dependencies are inferred from the claim text.