Virtual block structure for random read operations
AssigneeMicron Technology, Inc.
InventorsDeping He, Caixia Yang
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsDeping He, Caixia Yang
Estimating the term…
Methods, systems, and devices for virtual block structure for random read operations are described. A memory system may implement sub-virtual blocks within each virtual block of the memory system. To use an implemented sub-virtual block architecture, the memory system may write to a first sub-virtual block of a virtual block before writing to a second sub-virtual block of the virtual block. The memory system may perform various access operations at the non-volatile memory of the memory system by accessing the first sub-virtual block or the second sub-virtual block of the virtual block. In some examples, after writing to and reading from the sub-virtual blocks, the memory system may perform an erase operation on all sub-virtual blocks of the virtual block simultaneously.
A memory system, comprising:
A non-transitory computer-readable medium storing code comprising instructions which, when executed by processing circuitry of a memory system, cause the memory system to:
A method at a memory system, comprising:
Dependencies are inferred from the claim text.