Apparatus and method for address pre-translation to enhance direct memory access by hardware subsystems

An apparatus comprising:

• a processor core to execute one or more instructions to store/enqueue a job descriptor, stored in a memory, into a job queue, the job descriptor comprising a command field to indicate a command to be performed, a command type field to indicate a command type, and an address field for determining an address space;
• a hardware subsystem to be shared by a plurality of processes including the process, the hardware subsystem configured to:
• retrieve the job descriptor;
• process the job descriptor, and
• perform the command based on the command type field,
• wherein, when the command type field indicates the command is a device-specific command, the circuitry is to perform a direct memory access (DMA) operation to access the memory at one or more address locations associated with a process address space identifier (PASID) determinable via the address field of the job descriptor;
• and
• wherein, when the command type field indicates the command is a common control command, the hardware subsystem is to perform a control operation associated with the job queue.