US 2026/0288630 A1 · MEMORY SYSTEM

Abstract

A memory system with high reading operation performance is provided. A memory system is connectable to a host device and includes a first memory device and a controller. The first memory device is a non-volatile memory including a first memory cell region assigned with a first consecutive physical address range and a second memory region separate from the first memory cell region and assigned with a second consecutive physical address range that is separate from the first consecutive physical address range. The controller is configured to store vector information received from the host device in the first memory cell region and not in the second memory cell region, and store non-vector information received from the host device in the second memory cell region and not in the first memory cell region.

Claims18

Dependent claims

A memory system connectable to a host device, comprising:

a first memory device, which is a non-volatile memory including a first memory cell region assigned with a first consecutive physical address range and a second memory region separate from the first memory cell region and assigned with a second consecutive physical address range that is separate from the first consecutive physical address range;
and
a controller configured to store vector information received from the host device in the first memory cell region and not in the second memory cell region, and store non-vector information received from the host device in the second memory cell region and not in the first memory cell region.

A memory system connectable to a host device, comprising:

a first memory device, which is a non-volatile memory including a memory cell region assigned with a physical address range;
a second memory device provided separately from the first memory device, the second memory device including a first cache region;
and
a controller configured to:
maintain, in the first memory device, mapping information indicating logical-physical address correspondence for the memory cell region, the mapping information being separated into a first mapping segment for vector information and a second mapping segment for non-vector information;
selectively store a part of the mapping information in the first cache region of the second memory device;
and
store address mapping for vector information received from the host device in the first mapping segment and not in the second mapping segment and address mapping for non-vector information received from the host device in the second mapping segment and not in the first mapping segment.

5 more elements

Dependencies are inferred from the claim text.

Memory system

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Memory system

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Abstract

Claims18