Apparatuses and methods for per-row count based refresh target identification
AssigneeMicron Technology, Inc.
InventorsYang Lu, Yuan He, Kang-Yong Kim, Randall J. Rooney, Dong Pan
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Abstract
Apparatuses and methods per-row count based refresh target identification. A memory device stores count values associated with the word lines. An aggressor detector circuit stores a maximum of the count values and a row address associated with the maximum count value. Responsive to a targeted refresh signal, the stored count value is compared to a threshold. If the count value has crossed the threshold, then a targeted refresh operation may be performed on one or more refresh addresses based on the stored address, and the count value may be reset.
Claims20
An apparatus comprising:
- a memory array comprising a plurality of word lines, each word line having counter memory cells configured to store a count value associated with the word line;
- a counter circuit configured to read the count value from the counter memory cells of a selected word line, update the count value, and write the updated count value back to the counter memory cells;
- a candidate register configured to store a row address and an associated count value;
- a register management circuit configured to compare the updated count value to the associated count value and to overwrite the row address and the associated count value in the candidate register with a current row address and the updated count value when the updated count value is greater than the associated count value;
- and
- a refresh address generator configured to generate a refresh address based on the row address stored in the candidate register when the associated count value stored in the candidate register has crossed a threshold.
The apparatus of claim 1, wherein the counter circuit is configured to increment the count value to generate the updated count value.
The apparatus of claim 1, further comprising a mode register configured to store a threshold setting, wherein the threshold has a value based on the threshold setting.
The apparatus of claim 3, wherein the threshold setting is configurable to one of a plurality of threshold levels.
The apparatus of claim 1, wherein the counter memory cells are configured to store bits of a binary number representing the count value.
The apparatus of claim 1, wherein the refresh address generator is configured to skip generating the refresh address when the associated count value stored in the candidate register has not crossed the threshold.
The apparatus of claim 1, wherein the counter circuit is configured to reset the count value associated with the row address stored in the candidate register when the associated count value has crossed the threshold.
The apparatus of claim 1, wherein the refresh address generator is configured to generate the refresh address corresponding to one or more victim word lines adjacent to a word line associated with the row address stored in the candidate register.
A memory device comprising:
- a memory array comprising a plurality of word lines, each word line configured to store a count value in counter memory cells along the word line;
- a mode register configured to store a threshold value;
- a counter circuit coupled to the memory array and configured to read the count value from the counter memory cells of a selected word line, increment the count value, and write the incremented count value back to the counter memory cells;
- a candidate register configured to store a row address and an associated count value;
- a register management circuit configured to compare the incremented count value to the associated count value and to store the row address and the incremented count value in the candidate register when the incremented count value exceeds the associated count value;
- and
- a refresh control circuit configured to compare the associated count value stored in the candidate register to the threshold value stored in the mode register and to perform a targeted refresh operation based on the row address stored in the candidate register when the associated count value has crossed the threshold value.
The memory device of claim 9, wherein the mode register is configured to receive the threshold value from a memory controller.
The memory device of claim 9, wherein the threshold value is configurable to one of a plurality of threshold levels.
The memory device of claim 9, wherein the refresh control circuit is configured to skip the targeted refresh operation when the associated count value stored in the candidate register has not crossed the threshold value stored in the mode register.
The memory device of claim 9, wherein the counter circuit is configured to reset the count value associated with the row address stored in the candidate register responsive to the targeted refresh operation being performed.
The memory device of claim 9, wherein the targeted refresh operation refreshes one or more victim word lines adjacent to a word line associated with the row address stored in the candidate register.
A method comprising:
- writing a threshold value to a mode register of a memory device;
- accessing a word line of a memory array and reading a count value from counter memory cells along the word line;
- updating the count value and writing the updated count value back to the counter memory cells;
- storing a row address associated with the word line and the updated count value in a candidate register when the updated count value is greater than a stored count value in the candidate register;
- comparing the stored count value in the candidate register to the threshold value stored in the mode register responsive to a targeted refresh signal;
- and
- performing a targeted refresh operation on one or more victim word lines based on the row address stored in the candidate register when the stored count value has crossed the threshold value.
The method of claim 15, further comprising skipping the targeted refresh operation when the stored count value has not crossed the threshold value.
The method of claim 15, wherein writing the threshold value to the mode register comprises performing a mode register write operation to configure the threshold value to one of a plurality of threshold levels.
The method of claim 15, further comprising resetting the count value associated with the row address stored in the candidate register responsive to performing the targeted refresh operation.
The method of claim 15, further comprising generating the targeted refresh signal responsive to a refresh management command or responsive to a refresh signal.
The method of claim 15, wherein the one or more victim word lines comprise word lines physically adjacent to the word line associated with the row address stored in the candidate register.
Dependencies are inferred from the claim text.